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21st century Commodore 64 development

 

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Adoreware is focusing on “Extreme Cartridge 2” or EC2.  EC2 is being developed to try to preserve every cartridge created for the C64.  A lot of cartridges are impossible to find or only the ROMs are available.  Due to the age, a lot of cartridges are on the brink of extinction because they are still being used and electronic components are reaching their life span.  If you would like to support us or leave any comments, please see the Contact page.

 

Below you can see the progress of the hardware development of EC2.  Click Animation (6 Megs) to see a 360 degree view of EC2.  The file is about 6 Megs so consider that if you are on dial up.

 

Please read Petscii - Extreme Cartridge 2 forum for EC2 progress.

 

Extreme Cartridge 2 Technical Specifications

 

The EC2 is built around the Cyclone EP2C20F484 FPGA.  The EC2 resources include 4M Flash memory, SD Card Slot, 8M SDRAM, 512K SRAM, and 24, 27 and 50 MHz clocks.  4M Flash can hold 512 8K ROM images. The EP2C20F484 alone is $65.00, so the EC2 will be more expensive then the MMC Replay.  The EC2 is capable of bank switching, RAM emulation, 8K, 16K, and 20K ROM emulation (yes Super Zaxxon!!!), and hardware emulation of just about any cartridge built for the C64 with an additional daughter board.

 

I already have seen wish lists for emulating SuperCPU, RR-Net, Video Byte II, Prophet 64, Zestaw4, and Super 1750 Clone and all these are being looked at. I have already started working on emulating Action Reply 5, ISEPIC, Warp Speed, Epyx Fastload, Explode 3, Turbo Load and Save, and Super Snap Shot 5 all of which I own personally.  If you want something else emulated, I will need the ROM image and a schematic.  The first cartridge emulated with the EC2 was an 8K Ultimax cartridge (Avenger).  You can download a list of game cartridges I plan to emulate, but keep in mind that many more are possible but I will need the ROM and possibly the schematic.  I don’t have a list of non-game cartridges, but I do have a huge collection I will be working on.

 

I have also noticed interest in being able to save a game and return.  This is already possible with available Freeze Cartridges. I have also been working on my own freeze routing that is a very accurate way to “Freeze” the C64 better then most cartridges.  If you want to know why this freeze routing is better, drop me an email and we will discuss it.

 

The chart below shows basic resource comparison between the EC2 and the MMC Replay.

 

Resource                                  Extreme Cartridge 2     MMC Replay (2 x EPM3064)

Logical Elements                       18,752                         2,500

RAM Memory Bits                   239,616                       0

Embedded Multipliers               26                                0

IOs                                          91                                19

PLLs                                        4                                  0

Clocks                                     24,27,50MHz              None

SDRAM                                  8MB                            0

SRAM                                     512KB (256KBx16)   512KB (512KBx8)

Flash ROM                              4MB                            512KB

SRAM Expansion                     1Meg                           None

SD Card Slot                           Yes                              Yes

 

Location of SD Card

 

 

 

 

Location of 2 push button switches

 

 

 

Location of 2 LEDs

 



 

Location of external clock input

(The clock input level can be selected as either 3.3V or 5.0V by using jumper W1.)

 

 

 

Location of two 8 bit IO ports

(Currently one port is being designing as a serial port to emulate a 1541. Both ports are 5.0V tolerant allowing direct connection to C64 external peripherals.)

 

 

 

Location of 40 bit IO port 1

(This Port shares IO lines with the on board 512K SRAM and can be shared by inverting the OE output on pin 20 and connecting it to the hardware’s OE pin connected to the port. The OE output is hardwired to the on board 512K SRAM’s OE input. This allows the SRAM to be removed from the port allowing the port to be used as a GPIO, additional SRAM or IDE hard drive interface.  One thing that needs tobo pointed out is that the EC2 board has one additional address line (A18) then the Cyclone II FPGA Starter Board.  CAUTION!!!, CAUTION!!!, CAUTION!!!  This port is only 3.3V and NOT 5.0V tolerant and WILL blow the FPGA if it is connected to 5.0V IO lines without 47 ohm resistors.)

 

 

 

 

Location of 3.3V power header

(A header will be installed to provide power for hardware connected to the 40 pin header above it. The on board SRAM is 3.3V so I’m supplying this voltage for additional SRAM. 5.0V is provided on an additional header below the second 40 pin GPIO port.)

 

 

 

Location of 35 bit IO port 2

(Some of the IO lines are connected to the FPGA’s Active Serial and JTAG ports. TheEC2 board DOES NOT have a  serial configuration ROM so a daughter board has to be connected to this port with a configuration serial ROM before the FPGA will configure and boot. The JTAG port allows manual configuration of the FPGA while I’m developing it or while there is no a  serial configuration ROM installed. The remaining 19 IO ports are somewhat laid out like an Amiga clock port.  Some of the pins tie to the same FPGA pins used on the Cyclone II FPGA Starter Board so the Audio Codec can be added on as a daughter board. The use of the JTAG and Active Serial port IO pins after configuration is possible, but not recommended.  Pin 8 of the port provides a 24MHz clock for Audio Codec and MP3 encoding. CAUTION!!!, CAUTION!!!, CAUTION!!!  This port is only 3.3V and NOT 5.0V tolerant and WILL blow the FPGA if it is connected to 5.0V IO lines without 47 ohm resistors.)

 

 

 

 

 

Location of 3.3V and 5.0V power header

(A header will be installed to provide power for hardware connected to the 40 pin header above it. Read caution above concerning the IO lines voltage levels.)

 

 

 

Recommended Maximum Daughter Board Size

(All daughter boards MUST have a Serial Configuration ROM and connect to the 40 Pin IO Port 2 where the Active Serial Port is located.  The Daughter Board does not have to connect to both 40 pin IO Ports, but I recommend it for structural integrity.  The Daughter Board MUST have all the components mounted on the bottom side of the board in order to fit into the standard cartridge case.  The FPGA, SRAM, and SDRAM on the EC2 board are all low profile ICs and allow more then enough room for SMT components above them on the daughter board’s under side. If using Port 1 for IDE hard drive, a header will need to be installed and a hole cut in the cartridge case.)

 

 

 

 

The Altera Cyclone II FPGA Starter Board

(This is what is being used to develop the EC2. This development board is very reasonably priced and has two 40 PIN 5.0V tolerant GPIO ports.)

 

 

 

 

The Cyclone II FPGA Starter Board’s C64 Cartridge Port Interface

(All 38 IO pins on the C64 Cartridge port are connected to the GPIO port on the Cyclone II FPGA Starter Board. The IO’s are 5.0V tolerant due to 47 ohm resistors.  I have tested this to make sure by emulating the C64’s EPROMS with the starter board before I began creating the EC2 board. Development originally began with the Cyclone III board but was scrapped because the level translation from 1.3V to 5.0V would have been extremely expensive if not impossible.  The Cyclone III board was sold, and replaced with the Cyclone II due to 5.0V tolerance.)

 

 

 

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